/***************************************************************************
 *                                                                         *
 * Copyright (c) 2007 - 2009 Nuvoton Technology Corp. All rights reserved.*
 *                                                                         *
 ***************************************************************************/
 
#include <stdio.h>
#include "wblib.h"
#include "NUC900_VPOST_Regs.h"
#include "NUC900_VPOST.h"

#ifdef	HAVE_HIMAX_80_18BIT

#ifdef ECOS
cyg_handle_t	vpost_int_handle;
cyg_interrupt	vpost_int_holder;
#endif

//static VPOST_T	_tHIMAX_80_18BIT;
static UINT32 g_nScreenWidth;
static UINT32 g_nScreenHeight;

static void Delay(int nCnt)
{
	volatile int  loop;
	for (loop=0; loop<nCnt; loop++);
}

#if 0
static void vpostDisp_F_ISR(void)
{
    outpw(REG_LCM_INT_CS,inpw(REG_LCM_INT_CS) | VPOSTB_DISP_F_STATUS);
    vpostVAStartTrigger();
}
static void vpostUNDERRUN_ISR(void)
{
	outpw(REG_LCM_INT_CS,inpw(REG_LCM_INT_CS) | VPOSTB_UNDERRUN_INT);
}

static void vpostBUS_ERROR_ISR(void)
{
	outpw(REG_LCM_INT_CS,inpw(REG_LCM_INT_CS) | VPOSTB_BUS_ERROR_INT);
}
#ifdef ECOS
static cyg_uint32 vpostIntHandler(cyg_vector_t vector, cyg_addrword_t data)
#else
static void vpostIntHandler(void)
#endif
{
   /* clear VPOST interrupt state */
   UINT32 uintstatus;
   
   uintstatus = inpw(REG_LCM_INT_CS);
   if (uintstatus & VPOSTB_DISP_F_STATUS)  
      vpostDisp_F_ISR();
   else if (uintstatus & VPOSTB_UNDERRUN_INT)
      vpostUNDERRUN_ISR();
   else if (uintstatus & VPOSTB_BUS_ERROR_INT)
      vpostBUS_ERROR_ISR();

#ifdef ECOS
	return CYG_ISR_HANDLED;
#endif
}

static void vpostEnable_Int(void)
{
#ifdef ECOS
    cyg_interrupt_create(IRQ_LCD, 1, 0, vpostIntHandler, NULL, &_tHIMAX_80_18BIT.vpost_int_handle, &_tHIMAX_80_18BIT.vpost_int_holder);
    cyg_interrupt_attach(vpost_int_handle);
    cyg_interrupt_unmask(IRQ_LCD);
#else
    sysInstallISR(IRQ_LEVEL_1, IRQ_LCD, (PVOID)vpostIntHandler);
    /* enable VPOST interrupt */
    sysEnableInterrupt(IRQ_LCD);
#endif
    writew(REG_LCM_DCCS,readw(REG_LCM_DCCS) | VPOSTB_DISP_INT_EN);
    writew(REG_LCM_INT_CS,readw(REG_LCM_INT_CS) | VPOSTB_UNDERRUN_EN | VPOSTB_DISP_F_EN);
}
#endif

//INT vpostOSDInit_HIMAX_80_18BIT(UINT16 ucOSDSrcType,UINT16 usxstart,UINT16 usystart,
//											UINT16 usxend,UINT16 usyend,UINT16 usOSDPicWidth)
INT vpostOSDInit_HIMAX_80_18BIT(POSDFORMATEX pOSDformatex)
{

    vpostSetOSDSrc(pOSDformatex->ucOSDSrcFormat);
    vpostSetOSDBuffer(pOSDformatex->pFrameBuffer);
    /*if (ucOSDSrcType != 0)
     	writew(REG_LCM_DCCS,readw(REG_LCM_DCCS) | ucOSDSrcType);
     else
     	writew(REG_LCM_DCCS,readw(REG_LCM_DCCS) & 0xffff0fff);//clear OSD SRC setting	
	*/
	vpostOSDSetWindow(pOSDformatex->nXstart,pOSDformatex->nYstart,pOSDformatex->nOSDWidth,pOSDformatex->nOSDHeight);
     
	
	
	writew(REG_LCM_OSD_FBCTRL,0);//clear OSD STRIDE,FF setting
    if ((pOSDformatex->ucOSDSrcFormat==OSD_SRC_RGB888)||(pOSDformatex->ucOSDSrcFormat==OSD_SRC_RGB666))
    {
		
		writew(REG_LCM_OSD_FBCTRL,inpw(REG_LCM_OSD_FBCTRL) | (pOSDformatex->nImageWidth<<16) | pOSDformatex->nImageWidth); //OSDFF~OSD_STRIDE
    }
    else if (pOSDformatex->ucOSDSrcFormat==OSD_SRC_RGB332)
    {
    	writew(REG_LCM_OSD_FBCTRL,inpw(REG_LCM_OSD_FBCTRL) | ((pOSDformatex->nImageWidth/4)<<16) | (pOSDformatex->nImageWidth/4)); //OSDFF~OSD_STRIDE
    }
    else{
        writew(REG_LCM_OSD_FBCTRL,inpw(REG_LCM_OSD_FBCTRL) | ((pOSDformatex->nImageWidth/2)<<16) | (pOSDformatex->nImageWidth/2)); //OSDFF~OSD_STRIDE
    }
    //vpostOSDScalingCtrl(0,,0);
    vpostOSDScalingCtrl(1,0,0);  // add by smf
    vpostOSDSetOverlay(DISPLAY_OSD,DISPLAY_OSD,0,0,0);  // add by smf
    
    return 0;
}

static void vpostInitialFunction1(UINT8 ROT90)
{

    UINT16 rdata;
    

#if 1
	vpostLCDWriteAddr(0x00);
	rdata = vpostLCDReadData();
	
    #ifdef _DEBUG
        printf("\nHimax LCM ID is 0x%4x !!\n\n", rdata);	
    #endif    
#endif	
    
	vpostLCDWriteAddr(0x01);
	vpostLCDWriteData(0x011B);

	vpostLCDWriteAddr(0x02);
	vpostLCDWriteData(0x0700);
	
#ifdef _MPU_VSYNC_TYPE	
	vpostLCDWriteAddr(0x03);
    vpostLCDWriteData(0x1220);  // RGB order; HWM mode enabled; scan from Right to Left
//    vpostLCDWriteData(0x1230);  // RGB order; HWM mode enabled; scan from Left to Right    
//    vpostLCDWriteData(0x0220);  // BGR order; HWM mode enabled    
#else
	vpostLCDWriteAddr(0x03);
//	vpostLCDWriteData(0x6020);
//    vpostLCDWriteData(0x1020);  // RGB order; scan from Right to Left
    vpostLCDWriteData(0x1030);  // RGB order; scan from Left to Right
//    vpostLCDWriteData(0x0020);  // BGR order; scan from Right to Left    
//    vpostLCDWriteData(0x0030);  // BGR order; scan from Left to Right    
//  vpostLCDWriteData(0x7030);  // RGB order        
#endif
    
	vpostLCDWriteAddr(0x04);
	vpostLCDWriteData(0x0000);
	vpostLCDWriteAddr(0x05);
	vpostLCDWriteData(0x0000);
	
#ifdef _MPU_VSYNC_TYPE		
	vpostLCDWriteAddr(0x08);
//	vpostLCDWriteData(0x020E);  // FrontPorch = 2H, BackPorch = 14H
	vpostLCDWriteData(0x0E02);  // FrontPorch = 14H, BackPorch = 2H
#else
	vpostLCDWriteAddr(0x08);
	vpostLCDWriteData(0x0202);
#endif	

	vpostLCDWriteAddr(0x09);
	vpostLCDWriteData(0x0000);
	
#ifdef _MPU_VSYNC_TYPE			
	vpostLCDWriteAddr(0x0b);
//	vpostLCDWriteData(0x0000);  // RTN=0 (16 clock cycles per line); internal clock freq = 1.0 * OSC		
	vpostLCDWriteData(0x0004);  // RTN=4 (19 clock cycles per line); internal clock freq = 1.0 * OSC	
//	vpostLCDWriteData(0x0104);  // RTN=4 (19 clock cycles per line); internal clock freq = 0.5 * OSC
//	vpostLCDWriteData(0x000F);  // RTN=F (31 clock cycles per line); internal clock freq = 1.0 * OSC
#else
	vpostLCDWriteAddr(0x0b);
	vpostLCDWriteData(0x0004);  // RTN=4 (10 clock cycles per line); internal clock freq = 1 * OSC
#endif
	
	
#ifdef _MPU_VSYNC_TYPE			
	vpostLCDWriteAddr(0x0c);
	vpostLCDWriteData(0x0023);	// VSYNC interface
#else
	vpostLCDWriteAddr(0x0c);
	vpostLCDWriteData(0x0003);  // MPU (System) interface	
#endif	

	vpostLCDWriteAddr(0x40);
	vpostLCDWriteData(0x0000);
	
	vpostLCDWriteAddr(0x41);
	vpostLCDWriteData(0x00EF);
//	vpostLCDWriteData(219);
	
	vpostLCDWriteAddr(0x42);
	vpostLCDWriteData(0xDB00);
	vpostLCDWriteAddr(0x43);
	vpostLCDWriteData(0xDB00);
	
	vpostLCDWriteAddr(0x44);
	vpostLCDWriteData(0xAF00);
	vpostLCDWriteAddr(0x45);
	vpostLCDWriteData(0xDB00);
	Delay(4000);	
}


static void vpostPowerSettingFunction()
{
	vpostLCDWriteAddr(0x00);	
	vpostLCDWriteData(0x0001);	    
	Delay(400);	
	
	vpostLCDWriteAddr(0x10);	
	vpostLCDWriteData(0x0000);	    
	vpostLCDWriteAddr(0x11);	
	vpostLCDWriteData(0x0000);	
    
	vpostLCDWriteAddr(0x12);	
	vpostLCDWriteData(0x0000);	    
	vpostLCDWriteAddr(0x13);	
	vpostLCDWriteData(0x0000);	    
	vpostLCDWriteAddr(0x11);	
	vpostLCDWriteData(0x0000);	    
	vpostLCDWriteAddr(0x13);	
	vpostLCDWriteData(0x1518);	    
	vpostLCDWriteAddr(0x12);	
	vpostLCDWriteData(0x0008);	    
	vpostLCDWriteAddr(0x10);	
	vpostLCDWriteData(0x4040);	    
	Delay(400);		
	
	vpostLCDWriteAddr(0x11);	
	vpostLCDWriteData(0x0000);	    // bright is low
//	vpostLCDWriteData(0x0005);		// bright is high	
	
	vpostLCDWriteAddr(0x10);	
	vpostLCDWriteData(0x0054);	    
	vpostLCDWriteAddr(0x12);	
	vpostLCDWriteData(0x0013);	    
	vpostLCDWriteAddr(0x13);	
	vpostLCDWriteData(0x3518);	    
	Delay(4000);
}

static void vpostGrammaSettingFunction()
{
	vpostLCDWriteAddr(0x30);	
	vpostLCDWriteData(0x0000);	    
	vpostLCDWriteAddr(0x31);	
	vpostLCDWriteData(0x0704);		
	vpostLCDWriteAddr(0x32);	
	vpostLCDWriteData(0x0004);		
	vpostLCDWriteAddr(0x33);	
	vpostLCDWriteData(0x0604);	    	
	vpostLCDWriteAddr(0x34);	
	vpostLCDWriteData(0x0307);	    
	vpostLCDWriteAddr(0x35);	
	vpostLCDWriteData(0x0103);		
	vpostLCDWriteAddr(0x36);	
	vpostLCDWriteData(0x0707);		
	vpostLCDWriteAddr(0x37);	
	vpostLCDWriteData(0x0603);		
	vpostLCDWriteAddr(0x38);	
	vpostLCDWriteData(0x0000);		
	vpostLCDWriteAddr(0x39);	
	vpostLCDWriteData(0x0000);		
}

static void vpostDisplayOnFunction(UINT8 ROT90)
{
   
	vpostLCDWriteAddr(0x10);	
	vpostLCDWriteData(0x4040);

	vpostLCDWriteAddr(0x07);	
	vpostLCDWriteData(0x0005);
	Delay(400);
	vpostLCDWriteAddr(0x07);	
	vpostLCDWriteData(0x0025);	    
	vpostLCDWriteAddr(0x07);	
	vpostLCDWriteData(0x0027);	
	Delay(400);
	vpostLCDWriteAddr(0x07);	
	vpostLCDWriteData(0x0037);	    
	
	Delay(400);	
	
    #ifdef _DEBUG
        printf("****************************\n");	            
        for(ii=0; ii<0x48; ii++)
        {
        	vpostLCDWriteAddr(ii);	        
        	rdata = vpostLCDReadData();    
//            printf("LCM reg [0x%2x] = 0x%4x !!\n", ii, rdata);	        
        }
      
        #if 0       
            for(ii=0; ii<16; ii++)
            {
            	vpostLCDWriteAddr(0x45);	        
            	vpostLCDWriteData((0x01 << ii));	        	
            	rdata = vpostLCDReadData();    
                printf("LCM reg [0x%2x] = 0x%4x !!\n", ii, rdata);	        
            }
            
        	vpostLCDWriteAddr(0x45);
        	vpostLCDWriteData(0xDB00);
        #endif        	
        
        printf("****************************\n\n");	        
    #endif    
	
	
	vpostLCDWriteAddr(0x22);
	
}

static void vpostSetCRTC_HIMAX_80_18BIT(UINT16 usHorizontal,UINT16 usVertical,UINT16 usVASrcType,UINT16 usPicWidth)
{   
#if 0
	writew(REG_LCM_CRTC_SIZE,(((usVertical + 6) << 16) | usHorizontal) 
								+ CRTC_Retrace_HOffset	); //CRTC_SIZE

//	writew(REG_LCM_CRTC_DEND,((usVertical+1) << 16) | (usHorizontal) ); //CRTC_DEND
	writew(REG_LCM_CRTC_DEND,((usVertical) << 16) | (usHorizontal) ); //CRTC_DEND; 20070201 by MHKuo

	writew(REG_LCM_CRTC_HR,((usHorizontal + 4) << 16) | (usHorizontal+3)); //CRTC_HR

    writew(REG_LCM_CRTC_HSYNC,((usHorizontal + CRTC_Retrace_HOffset - 5) << 16)
    							| (usHorizontal + CRTC_Retrace_HOffset - 10)); //CRTC_HSYNC
	writew(REG_LCM_CRTC_VR,((usVertical + 6/2) << 16)
    						| (usVertical)); //CRTC_VR
#endif
	writew(REG_LCM_CRTC_SIZE,0x00E200F0);
	writew(REG_LCM_CRTC_DEND,0x00DC00B0);
	writew(REG_LCM_CRTC_HR,0x00BF00BA);
	writew(REG_LCM_CRTC_HSYNC,0x00EB00E6);
	writew(REG_LCM_CRTC_VR,0x00DF00DC);
    						
    						
    						

#ifdef _MPU_VSYNC_TYPE
    outpw(REG_LCM_MPU_VSYNC, (0x0A<<3)|0x01);       // enable MPU VSYNC mode, VSYNC pulse width = 10 horizontal lines
#else
    outpw(REG_LCM_MPU_VSYNC, 0x00);                 // disable MPU VSYNC mode
#endif
    						

    if ((usVASrcType==VA_SRC_RGB888)||(usVASrcType==VA_SRC_RGB666))
    {
		//writew(REG_LCM_VA_FBCTRL,(usPicWidth << 16) | usPicWidth); //VAFF~VA_STRIDE (origin)
		writew(REG_LCM_VA_FBCTRL,inpw(REG_LCM_VA_FBCTRL) &~0x7ff07ff | (usPicWidth << 16) | usPicWidth); //VAFF~VA_STRIDE (for test)
	}
	else
    {
		//writew(REG_LCM_VA_FBCTRL,((usPicWidth/2) << 16) | (usPicWidth/2)); //VAFF~VA_STRIDE (origin)
		writew(REG_LCM_VA_FBCTRL,inpw(REG_LCM_VA_FBCTRL) &~0x7ff07ff | ((usPicWidth/2) << 16) | (usPicWidth/2)); //VAFF~VA_STRIDE (for test)
    }
}

static void vpostSetCRTC_2_HIMAX_80_18BIT(UINT16 usHorizontal,UINT16 usVertical,UINT16 usVASrcType)
{   
	writew(REG_LCM_CRTC_SIZE,(((usVertical + 6) << 16) | usHorizontal) 
								+ CRTC_Retrace_HOffset	); //CRTC_SIZE

//	writew(REG_LCM_CRTC_DEND,((usVertical+1) << 16) | (usHorizontal) ); //CRTC_DEND
	writew(REG_LCM_CRTC_DEND,((usVertical) << 16) | (usHorizontal) ); //CRTC_DEND; 20070201 by MHKuo	

	writew(REG_LCM_CRTC_HR,((usHorizontal + 15) << 16) | (usHorizontal + 10)); //CRTC_HR

    writew(REG_LCM_CRTC_HSYNC,((usHorizontal + CRTC_Retrace_HOffset - 5) << 16)
    							| (usHorizontal + CRTC_Retrace_HOffset - 10)); //CRTC_HSYNC
	writew(REG_LCM_CRTC_VR,((usVertical + 6/2) << 16)
    						| (usVertical)); //CRTC_VR

#ifdef _MPU_VSYNC_TYPE			
    outpw(REG_LCM_MPU_VSYNC, (0x0A<<3)|0x01);       // enable MPU VSYNC mode, VSYNC pulse width = 10 horizontal lines
#else
    outpw(REG_LCM_MPU_VSYNC, 0x00);                 // disable MPU VSYNC mode
#endif
    						
    						
#if 1
    if ((usVASrcType==VA_SRC_RGB888)||(usVASrcType==VA_SRC_RGB666))
    {
//		writew(REG_LCM_VA_FBCTRL,inpw(REG_LCM_VA_FBCTRL) &~0x7ff07ff | (usHorizontal << 16) | usHorizontal); //VAFF~VA_STRIDE (for test)
		writew(REG_LCM_VA_FBCTRL,inpw(REG_LCM_VA_FBCTRL) &~0x7ff0000 | (usHorizontal << 16)); //VAFF~VA_STRIDE (for test)
	}
	else
    {
//		writew(REG_LCM_VA_FBCTRL,inpw(REG_LCM_VA_FBCTRL) &~0x7ff07ff | ((usHorizontal/2) << 16) | (usHorizontal/2)); //VAFF~VA_STRIDE (for test)
		writew(REG_LCM_VA_FBCTRL,inpw(REG_LCM_VA_FBCTRL) &~0x7ff0000 | ((usHorizontal/2) << 16)); //VAFF~VA_STRIDE (for test)		
    }
#else    						
    if ((usVASrcType==VA_SRC_RGB888)||(usVASrcType==VA_SRC_RGB666))
    {
		//writew(REG_LCM_VA_FBCTRL,(usPicWidth << 16) | usPicWidth); //VAFF~VA_STRIDE (origin)
		writew(REG_LCM_VA_FBCTRL,inpw(REG_LCM_VA_FBCTRL) &~0x7ff07ff | (usHorizontal << 16) | usPicWidth); //VAFF~VA_STRIDE (for test)
	}
	else
    {
		//writew(REG_LCM_VA_FBCTRL,((usPicWidth/2) << 16) | (usPicWidth/2)); //VAFF~VA_STRIDE (origin)
		writew(REG_LCM_VA_FBCTRL,inpw(REG_LCM_VA_FBCTRL) &~0x7ff07ff | ((usHorizontal/2) << 16) | (usPicWidth/2)); //VAFF~VA_STRIDE (for test)
    }
#endif    

}


void vpostSetup_HIMAX_80_18BIT(UINT8 ROT90)
{
	/* output-disable,video disable */
	writew(REG_LCM_DCCS,readw(REG_LCM_DCCS)& ~(VPOSTB_DISP_OUT_EN | VPOSTB_VA_EN));
	writew(REG_LCM_DCCS,readw(REG_LCM_DCCS) | VPOSTB_DISP_OUT_EN); //display_out-enable
	Delay(4000);
	vpostInitialFunction1(ROT90);
    vpostPowerSettingFunction();
    vpostGrammaSettingFunction();    
    vpostDisplayOnFunction(ROT90);
}

//INT vpostLCMInit_HIMAX_80_18BIT(VA_CB_FUNC_T *fnCallBack,UINT16 usVASrcType,UINT8 ucVADisMode,UINT16 usPicWidth,UINT8 ucROT90)
INT vpostLCMInit_HIMAX_80_18BIT(PLCDFORMATEX plcdformatex)
{
	/*
	_tHIMAX_80_18BIT.usDevWidth = 176;
	_tHIMAX_80_18BIT.usDevHeight = 220;
	_tHIMAX_80_18BIT.uCmdLow = VPOSTB_CMDLOW;
	_tHIMAX_80_18BIT.ucCmd16t18 = VPOSTB_CM16t18LOW;
	_tHIMAX_80_18BIT.uCmdBusWidth = VPOSTB_CMD16;
	_tHIMAX_80_18BIT.uDataBusWidth = VPOSTB_DATA16or18 | VPOSTB_IM256K_9or18;
	_tHIMAX_80_18BIT.ucMPU_Mode = VPOSTB_MPU80;
	_tHIMAX_80_18BIT.uMPU_ColorMode = VPOSTB_COLORTYPE_256K;
	_tHIMAX_80_18BIT.ucDeviceType = VPOSTB_DEVICE_MPU;
	_tHIMAX_80_18BIT.fnDisplayCallBack = fnCallBack;
	_tHIMAX_80_18BIT.uYUV_Range = VPOSTB_YUV2CCIR;
	*/
	UINT32 VA_FF;
	UINT32 VA_Sride;
	UINT32 nBytesPixel;
	UINT8 ucROT90;
	
	outpw(REG_LCM_DCCS,inpw(REG_LCM_DCCS) | VPOSTB_ENG_RST);
	Delay(100);
	outpw(REG_LCM_DCCS,inpw(REG_LCM_DCCS) & ~VPOSTB_ENG_RST);
	Delay(100);
	
	//outpw(REG_MISCR,0x00);// bridge-mode 0
	//outpw(REG_MISCR,0x01);// bridge-mode 1
	
	g_nScreenWidth = plcdformatex->nScreenWidth = 176;
	g_nScreenHeight = plcdformatex->nScreenHeight = 220;
	
	if ( (plcdformatex->ucVASrcFormat == VA_SRC_RGB888) || (plcdformatex->ucVASrcFormat == VA_SRC_RGB666))//4 BytesPixel
	{
	    nBytesPixel = 4;
	}
	else
	{
	    nBytesPixel = 2;
	}
	plcdformatex->nFrameBufferSize = 176*220*nBytesPixel;
	/* set the display buffer (fetch from VA_BADDR0, if at single buffer mode)*/
	if (vpostAllocVABuffer(plcdformatex,nBytesPixel)==FALSE)
		return ERR_NULL_BUF;
		
	/* set display mode */
	//vpostSetDisplayMode(ucVADisMode);
	vpostSetDisplayMode(0);   // continue mode
	
	/* set display video source format */
	vpostSetVASrc(plcdformatex->ucVASrcFormat);
	/*
	if (usVASrcType!=0)
		outpw(REG_LCM_DCCS,inpw(REG_LCM_DCCS) | usVASrcType);
	else
		outpw(REG_LCM_DCCS,inpw(REG_LCM_DCCS) & ~(7<<8));
	*/
	//18-bit,256k,80mode,mpu-based,cmd18-16L0
	
	
	//vpostSetDeviceCtrl(_tHIMAX_80_18BIT);
	outpw(REG_LCM_DEV_CTRL,0x0);  //clear register
	writew(REG_LCM_DEV_CTRL,inpw(REG_LCM_DEV_CTRL) | VPOSTB_CMDLOW 
												   | VPOSTB_CM16t18LOW
												   | VPOSTB_CMD16
												   | VPOSTB_DATA16or18 | VPOSTB_IM256K_9or18
												   | VPOSTB_MPU80
												   | VPOSTB_COLORTYPE_256K
												   | VPOSTB_DEVICE_MPU 
												   | VPOSTB_YUV2CCIR );
												   
#if 0
    outpw(REG_LCM_DEV_CTRL, inpw(REG_LCM_DEV_CTRL) | VPOSTB_CM16t18HIGH);
#endif
	
	
	/*
	outpw(REG_LCM_DEV_CTRL,0xE0);//set default value
	writew(REG_LCM_DEV_CTRL,inpw(REG_LCM_DEV_CTRL) | _tHIMAX_80_18BIT.uCmdLow 
												   | _tHIMAX_80_18BIT.ucCmd16t18
												   | _tHIMAX_80_18BIT.uCmdBusWidth
												   | _tHIMAX_80_18BIT.uDataBusWidth
												   | _tHIMAX_80_18BIT.ucMPU_Mode
												   | _tHIMAX_80_18BIT.uMPU_ColorMode
												   | _tHIMAX_80_18BIT.ucDeviceType );
	*/
	

	if (ucROT90)
		vpostSetCRTC_HIMAX_80_18BIT(g_nScreenHeight, g_nScreenWidth,
						plcdformatex->ucVASrcFormat, g_nScreenWidth);// OR Hori=161 Ver=127
	else
		vpostSetCRTC_HIMAX_80_18BIT(g_nScreenWidth, g_nScreenHeight,
						plcdformatex->ucVASrcFormat, g_nScreenWidth);
	
	/* set video stream frame buffer control */
	VA_FF = (plcdformatex->nScreenWidth)*(nBytesPixel)/4;//word unit
    VA_Sride = (plcdformatex->nScreenWidth)*(nBytesPixel)/4;//word unit
    outpw(REG_LCM_VA_FBCTRL,inpw(REG_LCM_VA_FBCTRL) &~0x7ff07ff | (VA_FF<<16) | VA_Sride);
    				
	vpostSetup_HIMAX_80_18BIT(ucROT90);
	
	//outpw(0xb0008030,0x04000400);
#if 0	
	{
		int data,i;
		for (i=0;i<0xbf;i++)
		{
			vpostLCDWriteAddr(i);
			data = vpostLCDReadData();
			printf("reg %x = %x\n",i,data);
		}
	}
#endif	

	vpostVAStartTrigger();   // add by smf
	
//	vpostEnable_Int();
    //(*fnCallBack)(0, 0);
	return 0;
}


//INT vpostLCMInit_2_HIMAX_80_18BIT(VA_CB_FUNC_T *fnCallBack,UINT16 usVASrcType,UINT8 ucVADisMode,UINT8 ucROT90)
INT vpostLCMInit_2_HIMAX_80_18BIT(PLCDFORMATEX plcdformatex)
{
	
	/*
	_tHIMAX_80_18BIT.usDevWidth = 176;
	_tHIMAX_80_18BIT.usDevHeight = 220;
	_tHIMAX_80_18BIT.uCmdLow = VPOSTB_CMDLOW;
	_tHIMAX_80_18BIT.ucCmd16t18 = VPOSTB_CM16t18LOW;
	_tHIMAX_80_18BIT.uCmdBusWidth = VPOSTB_CMD16;
	_tHIMAX_80_18BIT.uDataBusWidth = VPOSTB_DATA16or18 | VPOSTB_IM256K_9or18;
	_tHIMAX_80_18BIT.ucMPU_Mode = VPOSTB_MPU80;
	_tHIMAX_80_18BIT.uMPU_ColorMode = VPOSTB_COLORTYPE_256K;
	_tHIMAX_80_18BIT.ucDeviceType = VPOSTB_DEVICE_MPU;
	_tHIMAX_80_18BIT.fnDisplayCallBack = fnCallBack;
	*/
	

//	_uVASrcType = usVASrcType;
	UINT32 nBytesPixel;
	UINT8 ucROT90;
	
	outpw(REG_LCM_DCCS,inpw(REG_LCM_DCCS) | VPOSTB_ENG_RST);
	Delay(100);
	outpw(REG_LCM_DCCS,inpw(REG_LCM_DCCS) & ~VPOSTB_ENG_RST);
	Delay(100);
	
	g_nScreenWidth = plcdformatex->nScreenWidth = 176;
	g_nScreenHeight = plcdformatex->nScreenHeight = 220;
	
	if ( (plcdformatex->ucVASrcFormat == VA_SRC_RGB888) || (plcdformatex->ucVASrcFormat == VA_SRC_RGB666))//4 BytesPixel
	{
	    nBytesPixel = 4;
	}
	else
	{
	    nBytesPixel = 2;
	}
	plcdformatex->nFrameBufferSize = 176*220*nBytesPixel;
	
	//outpw(REG_MISCR,0x00);// bridge-mode 0
	//outpw(REG_MISCR,0x01);// bridge-mode 1
	
	/* set the display buffer (fetch from VA_BADDR0, if at single buffer mode)*/
	if (vpostAllocVABuffer(plcdformatex,nBytesPixel)==FALSE)
		return ERR_NULL_BUF;
		
	/* set display mode */
	//vpostSetDisplayMode(ucVADisMode);
	vpostSetDisplayMode(0);  // continue mode
	
	/* set display video source format */
	vpostSetVASrc(plcdformatex->ucVASrcFormat);
	
	//vpostSetDeviceCtrl(_tHIMAX_80_18BIT);
	outpw(REG_LCM_DEV_CTRL,0x0);  //clear register
	writew(REG_LCM_DEV_CTRL,inpw(REG_LCM_DEV_CTRL) | VPOSTB_CMDLOW 
												   | VPOSTB_CM16t18LOW
												   | VPOSTB_CMD16
												   | VPOSTB_DATA16or18 | VPOSTB_IM256K_9or18
												   | VPOSTB_MPU80
												   | VPOSTB_COLORTYPE_256K
												   | VPOSTB_DEVICE_MPU );
#if 1
	if (ucROT90)
		vpostSetCRTC_2_HIMAX_80_18BIT(g_nScreenHeight, g_nScreenWidth,
						plcdformatex->ucVASrcFormat);// OR Hori=161 Ver=127
	else
		vpostSetCRTC_2_HIMAX_80_18BIT(g_nScreenWidth, g_nScreenHeight,
						plcdformatex->ucVASrcFormat);
#else
	if (ucROT90)
		vpostSetCRTC_HIMAX_80_18BIT(g_nScreenHeight, g_nScreenWidth,
						plcdformatex->ucVASrcFormat, g_nScreenWidth);// OR Hori=161 Ver=127
	else
		vpostSetCRTC_HIMAX_80_18BIT(g_nScreenWidth, g_nScreenHeight,
						plcdformatex->ucVASrcFormat, g_nScreenWidth);
#endif						

					
	vpostSetup_HIMAX_80_18BIT(ucROT90);
	//outpw(0xb0008030,0x04000400);
	
	vpostVAStartTrigger();   // add by smf
	
//	vpostEnable_Int();
    //(*fnCallBack)(0,0);
	return 0;
}

#endif	/* _HAVE_HIMAX_80_18BIT */